搜索资源列表
IPcore
- 非常有用的IP核资源,里面包含了JTAG,MEMORY,PCI,SDRAM和USB1.1等内容,期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
ddr_sdr_V1_1
- DDR控制器 - 用XILINX Virtex II FPGA实现 - 使用DDR MT46V16M16作为仿真模型 - 通用化-DR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted
SDRAMverilog
- SDRAM 驱动,Verilog HDL源码-SDRAM-driven, Verilog HDL source code
SDRAMController
- xilinx公司SDRAM的参考设计,调试成功-xilinx' s SDRAM reference design, debug successful
mt48lc4m32b2
- SDRAM module Verilog HDL-SDRAM module Verilog HDL
UP_IP_Library_80
- altera大学IP库,包含ps2、sdram、rs232等-altera University, IP libraries, including the ps2, sdram, rs232, etc.
ddr_sdram_controller
- DDR SDRAM Controller design
control_interface
- sdram控制器i/o接口模块的VHDL源程序文件,可直接用-sdram interface
TheResearchoftherealtimesignalprocessingofSARbased
- 3.完成系统的FPGA程序开发与调试,主要包括FFT,IFFT,CMUL和转置 存储控制等模块,在此基础上,重点介绍了一种基于DDR SDRAM的行写行读高 效转置存储算法,在采用该算法进行转置存储操作时,读写两端的速度相匹配, 满足流水线操作要求,提高了整个系统的实时性。最后介绍了采用CORDIC算法 实现复图像求模运算的方法,分析了算法的硬件实现结构,并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging ar
SDRAM
- SDRAM implemented using VHDL
Sdram_Control_2Port
- 双端口SDRAM控制器,将SDRAM虚拟成两个端口,已经在ALTER DE2开发板的硬件上验证通过,采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
memtest
- 在数字系统中,一般存在多个芯片,利用不同的特点用于实现不同的功能,一般都包含CPU,FPGA,AD,DA,memory,ASSP(专用标准模块),ASIC等。CPU用于进行智能控制,FPGA进行硬件算法处理和多设备接口,AD进行模数转换,DA进行数模转换,memory存储临时数据。因此,FPGA如何与其他芯片进行通讯是重要的设计内容。数据输入,数据输出,双向通讯,指令传递,地址管理,不同时钟的异步通讯问题等等都需要处理。最基本的MEMORY如SRAM(128KX8bbit静态存储器628128)
DE2_LCM_CCD_inverse
- DE2版自带的CCD驱动,将图像存储于SDRAM中-DE2 version comes with the CCD driver in the image stored in SDRAM
sdram_ctrl.tar
- sdram controller VHDL source code
ddr_sdr_V1_1
- its the vhdl stuff for ddr sdram controller nice one easily understandable-its the vhdl stuff for ddr sdram controller nice one easily understandable
sdramc_vhdl
- Xilinx提供的SDRAM控制器参考设计(VHDL)-SDRAM controller reference design (VHDL) designed by Xilinx
SDRAMcontrol
- 用VHDL编写的SDRAM控制器,能实现SDRAM的读写控制及片选。-Prepared using VHDL SDRAM controller, able to SDRAM read and write control and chip select.
CCD
- 本设计主要用来进行图像采集处理,通过摄像头采集图像信息,经过插值算法后存储到外部SDRAM,然后读取图像数据,进行边缘滤波处理后经VGA输出到屏幕上。-This design is mainly used for image acquisition and processing,through the camera capture image information,after interpolation to the external memory after the SDRAM,and th
ddr
- DDR SDRAM 控制器 VHDL代码,可支持32bits数据总线-VHDL code for DDR SDRAM controller, supporting 32bits data bus
DDRSDRAMconclude
- DDR SDRAM技术总结 介绍DDR SDRAM的一些概念和难点 着重讲解主流DDRII的技术 最后结合硬件设计提出一些参考 -DDR SDRAM DDR SDRAM Technical Summary describes some of the concepts and difficult to explain the mainstream DDRII technology focused on the final hardware design combined with some ref